Chapter title | A synthesis method of LSGP partitioning for given-shape regular arrays |
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Authors | Megson, G.M. and Chen, X. |
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Abstract | This paper presents a method to partition and map a computational polytope onto processor arrays. Based on the theoretical framework of an existing LSGP method, a systematic design procedure is proposed which constructs an activity matrix, proposed by Darte, according to the shapes of the computational polytope and the processor array and derives a valid timing vector. By this method the given-shape mapping can be achieved with neither difficulty nor exhausted computations by removing the need to compute HNFs. |
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Keywords | Data structures, parallel algorithms, systolic arrays, LSGP partitioning, activity matrix, computational polytope given-shape regular arrays, locally sequential globally parallel, processor arrays, timing vector |
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Book title | Proceedings of the 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California |
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Page range | 234-238 |
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Year | 1995 |
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Publisher | IEEE |
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Publication dates |
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*Published* | 1995 |
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Place of publication | Los Alamitos, USA |
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ISBN | 0818670746 |
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Digital Object Identifier (DOI) | https://doi.org/10.1109/IPPS.1995.395938 |
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